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Micrel, Inc.
6GHz, 1:4 CML FANOUT BUFFER/TRANSLATOR WITH INTERNAL I/O TERMINATION
Precision Edge(R) SY58020U Precision Edge(R)
SY58020U
FEATURES
Precision 1:4, 400mV CML fanout buffer Guaranteed AC performance over temperature/ voltage: * > 6GHz fMAX clock * < 60ps tr / tf times * < 250ps tpd * < 15ps max. skew Low jitter performance: * < 10psPP total jitter (clock) * < 1psRMS random jitter (data) * < 10psPP deterministic jitter (data) Accepts an input signal as low as 100mV Unique input termination and VT pin accepts DC-coupled and AC-coupled differential inputs: LVPECL, LVDS, and CML 50 source terminated CML outputs Power supply 2.5V 5% and 3.3V 10% Industrial temperature range: -40C to +85C Available in 16-pin (3mm x 3mm) MLF(R) package Precision Edge(R)
DESCRIPTION
The SY58020U is a 2.5V/3.3V precision, high-speed, fully differential 1:4 CML fanout buffer. Optimized to provide four identical output copies with less than 15ps of skew and less than 10psPP total jitter, the SY58020U can process clock signals as fast as 6GHz. The differential input includes Micrel's unique, 3-pin input termination architecture interfaces to differential LVPECL, LVDS, and CML signals (AC- or DC-coupled) as small as 100mV without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an on-board output reference voltage (VREFAC) is provided to bias the VT pin. The outputs are optimized to drive 400mV typical swing into 50 loads, with extremely fast rise/fall times guaranteed to be less than 60ps. The SY58020U operates from a 2.5V 5% supply or 3.3V 10% supply and is guaranteed over the full industrial temperature range (-40C to +85C). For applications that require LVPECL outputs, consider the SY58021U or SY58022U 1:4 fanout buffer with 800mV and 400mV output swing, respectively. The SY58020U is part of Micrel's highspeed, Precision Edge(R) product line. Datasheets and support documentation can be found on Micrel's web site at www.micrel.com.
APPLICATIONS
s s s s s All SONET and All GigE clock distribution Fibre Channel clock and data distribution Backplane distribution Data distribution: OC-48, OC-48+FEC, XAUI High-end, low skew, multiprocessor synchronous clock distribution
FUNCTIONAL BLOCK DIAGRAM
IN 50 VT 50 /IN VREF-AC
TYPICAL PERFORMANCE
Q0 /Q0
2GHz Output
Q1
Amplitude
/Q1
Q2 /Q2
Q3 /Q3
(100mV/div.)
TIME (70ps/div.)
Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-020207 hbwhelp@micrel.com or (408) 955-1690
Rev.: C Amendment: /0
1
Issue Date: February 2007
Micrel, Inc.
Precision Edge(R) SY58020U
PACKAGE/ORDERING INFORMATION
GND VCC
Ordering Information(1)
12 11 10 9
/Q0
Q0
16
15
14
13
IN VT VREF-AC /IN
1 2 3 4 5 6 7 8
Q1 /Q1 Q2 /Q2
Part Number SY58020UMI SY58020UMITR(2) SY58020UMG(3) SY58020UMGTR(2, 3)
Package Type MLF-16 MLF-16 MLF-16 MLF-16
Operating Range Industrial Industrial Industrial Industrial
Package Marking 020U 020U 020U with Pb-Free bar-line indicator 020U with Pb-Free bar-line indicator
Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu
GND
/Q3
VCC
Q3
16-Pin
MLF(R)
(MLF-16)
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number 1, 4 Pin Name IN, /IN Pin Function Differential Input: This input pair receives the signal to be buffered. Each pin of this pair internally terminates with 50 to the VT pin. Note that this input will default to an indeterminate state if left open. See "Input Interface Applications" section. Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap for each input (IN, /IN) to the termination network for maximum interface flexibility. See "Input Interface Applications" section. Reference Output Voltage: This output biases to VCC -1.2V. It is used when AC-coupling to differential inputs. Connect VREF-AC directly to the VT pin. Bypass with 0.01F low ESR capacitor to VCC. See "Input Interface Applications" section. Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the pins as possible. Ground. Exposed pad must be connected to a ground plane that is the same potential as the ground pin. CML Differential Output Pairs: Differential buffered output copy of the input signal. The output swing is typically 400mV into 50 load. Normally terminate CML output pairs with 100 across Q and /Q outputs at the receiving end. Unused output pairs may be left floating with no impact on jitter or skew. See "CML Output Termination" section.
2
VT
3
VREF-AC
8, 13 5, 16 14, 15 11, 12 9, 10 6, 7
VCC GND, Exposed Pad /Q0, Q0, /Q1, Q1, /Q2, Q2, /Q3, Q3,
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Micrel, Inc.
Precision Edge(R) SY58020U
Absolute Maximum Ratings(Note 1)
Power Supply Voltage (VCC) ....................... -0.5V to +4.0V Input Voltage (VIN) ......................................... -0.5V to VCC CML Output Voltage (VOUT) ........... VCC-1.0V to VCC+0.5V Current (VT) Source or sink current on VT pin ........................ 100mA Input Current Source or sink current on IN, /IN .......................... 50mA Current (VREF) Source or sink current on VREF-AC, Note 4 ......... 1.5mA Lead Temperature Soldering, (20 seconds) .............. 260C Storage Temperature Range (TSTORE) .... -65C to +150C
Operating Ratings(Note 2)
Supply Voltage (VCC) ............................ +2.375V to +3.60V Operating Temperature Range (TA) ........... -40C to +85C Package Thermal Resistance MLF(R) (JA) Still-Air ............................................................. 60C/W 500lfpm ............................................................ 54C/W MLF(R) (JB) (Junction-to-Board Resistance), Note 3 .......... 33C/W
DC ELECTRICAL CHARACTERISTICS(Notes 5)
TA = -40C to +85C Symbol VCC ICC VIH VIL VIN VDIFF_IN RIN VREF-AC VT IN Parameter Power Supply Voltage Power Supply Current Input HIGH Voltage Input LOW Voltage Input Voltage Swing Differential Input Voltage Swing IN-to-VT Resistance Output Reference Voltage IN-to-VT Voltage See Figure 1a See Figure 1b Condition VCC = 2.5V VCC = 3.3V No load, VCC = max. (includes internal 50 pull-up) VCC-1.2 0 0.1 0.2 40 50 Min 2.375 3.0 Typ 2.5 3.3 150 Max 2.625 3.60 180 VCC VIH-0.1 1.7 3.4 60 Units V V mA V V V V V V
VCC -1.3 VCC -1.2 VCC -1.1 1.28
CML DC ELECTRICAL CHARACTERISTICS(Notes5)
VCC = 3.3V 10% or 2.5V 5%; RL = 100 across each output pair or equivalent; TA = -40C to +85C, unless otherwise stated. Symbol VOH VOUT VDIFF_OUT ROUT
Note 1.
Parameter Output HIGH Voltage Output Voltage Swing Differential Output Voltage Swing Output Source Impedance
Condition
Min
Typ
Max VCC 500 1000 60
Units V mV mV
VCC -0.020 VCC -0.010 see Figure 1a see Figure 1b 325 650 40 400 800 50
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Thermal performance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. Due to the limited drive capability, use for input of the same package only. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Note 2. Note 3. Note 4. Note 5.
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Micrel, Inc.
Precision Edge(R) SY58020U
AC ELECTRICAL CHARACTERISTICS
VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C; RL = 100 across each output pair or equivalent, unless otherwise stated. Symbol fMAX tpd tCHAN tSKEW tJITTER Parameter Maximum Operating Frequency Condition VOUT 200mV Clock NRZ Data Propagation Delay Channel-to-Channel Skew Part-to-Part Skew Clock Data tr, tf
Note 7. Note 8. Note 9.
Min 6
Typ
Max
Units GHz
10 110 180 4 260 15 50 1 10
Gbps ps ps ps psRMS psPP psRMS psPP ps
Note 7 Note 8 Note 9 Note 10 Note 11 Note 12 At full swing 2.5Gbps - 3.2Gbps 2.5Gbps - 3.2Gbps 20
Cycle-to-Cycle Jitter Total Jitter Random Jitter Deterministic Jitter
1 10 40 60
Output Rise/Fall Time 20% to 80%
Skew is measured between outputs of the same bank under identical transitions. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output signal.
Note 10. Total jitter definition: With an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. Note 11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps/3.2Gbps. Note 12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps with both K28.5 and 223-1 PRBS pattern
TIMING DIAGRAM
/IN IN
/Q Q tpd
SINGLE-ENDED AND DIFFERENTIAL SWINGS
VIN, VOUT 400mV
VDIFF_IN, VDIFF_OUT 800mV
Figure 1a. Single-Ended Voltage Swing
Figure 1b. Differential Voltage Swing
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Micrel, Inc.
Precision Edge(R) SY58020U
TYPICAL OPERATING CHARACTERISTICS
VCC = 2.5V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated.
500 450 400
AMPLITUDE (V)
Amplitude vs. Frequency
Skew vs. Temperature
7 6 5 SKEW (ps) 4 3 2 1 10000 12000 0 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) PROPAGATION DELAY (ps)
Propagation Delay vs. Input Voltage Swing
195 190 185 180 175 170 165 0 200 400 600 800 1000 1200 INPUT VOLTAGE SWING (mV)
350 300 250 200 150 100 50 0
0
2000
4000
6000
FREQUENCY (MHz)
8000
Propagation Delay vs. Temperature
184 PROPAGATION DELAY (ps) 183 182 181 180 179 178 177 176 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
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Micrel, Inc.
Precision Edge(R) SY58020U
FUNCTIONAL CHARACTERISTICS
VCC = 2.5V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated.
5GHz Output
200MHz Output
Amplitude (100mV/div.)
TIME (25ps/div.)
Amplitude (100mV/div.)
TIME (600ps/div.)
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Micrel, Inc.
Precision Edge(R) SY58020U
INPUT STAGE
VCC
IN 50 VT 50 /IN GND
Figure 2. Simplified Differential Input Buffer
INPUT INTERFACE APPLICATIONS
VCC VCC
VCC VCC
VCC
VCC
IN CML /IN SY58020U NC NC VT VREF-AC
0.01F CML
IN
IN
/IN SY58020U VT
LVDS /IN SY58020U NC VT VREF-AC
VREF-AC
NC
VCC
(Option: May connect VT to VCC)
Figure 3a. DC-Coupled CML Input Interface
Figure 3b. AC-Coupled CML Input Interface
Figure 3c. LVDS Input Interface
VCC
VCC
VCC
VCC
IN
LVPECL
LVPECL
IN /IN
/IN SY58020U VT 0.01F Rpd NC VREF-AC
0.01F VCC Rpd = 100 for a 3.3V system Rpd = 50 for a 2.5V system Rpd Rpd
SY58020U VT VREF-AC
For VCC = 2.5V, Rpd = 19 For VCC = 3.3V, Rpd = 50
Figure 3d. LVPECL Input Interface
Figure 3e. AC-Coupled LVPECL Input Interface
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Micrel, Inc.
Precision Edge(R) SY58020U
CML OUTPUT TERMINATION
Figures 4 and 5 illustrate how to terminate a CML output using both the AC-coupled and DC-coupled configuration.
VCC
509 509 Q 509
All outputs of the SY58020U are 50 with a 16mA current source.
VCC
50
50
Q 100 /Q
/Q
509
DC-bias
16mA
16mA
per application
GND
GND
Figure 4. CML DC-Coupled
Figure 5. CML AC-Coupled Termination
RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION
Part Number SY58020U SY58021U SY58022U Function 6GHz, 1:4 CML Fanout Buffer/Translator with Internal I/O Termination 4GHz, 1:4 LVPECL Fanout Buffer/Translator with Internal Termination 5.5GHz, 1:4 Fanout Buffer/Translator w/400mV LVPECL Outputs and Internal Input Termination 16-MLFTM Manufacturing Guidelines Exposed Pad Application Note M-0317 HBW Solutions Data Sheet Link http://www.micrel.com/product-info/products/sy58020u.shtml http://www.micrel.com/product-info/products/sy58021u.shtml http://www.micrel.com/product-info/products/sy58022u.shtml www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf http://www.micrel.com/product-info/as/solutions.shtml
M9999-020207 hbwhelp@micrel.com or (408) 955-1690
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Micrel, Inc.
Precision Edge(R) SY58020U
16-PIN MicroLeadFrame(R) (MLF-16)
Package EP- Exposed Pad
Die
CompSide Island
Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane
PCB Thermal Consideration for 16-Pin MLF(R) Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: Note 1. Package meets Level 2 qualification. Note 2. All parts are dry-packaged before shipment. Note 3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-020207 hbwhelp@micrel.com or (408) 955-1690
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